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AN4051 - FX2LP™ GPIF Flow State Feature for UDMA

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Introduction

Although the FX2LP™ GPIF flow state feature was created for UDMA, it is not limited to that interface. The GPIF flow state can capture other bus protocols, which gives it a value and lifetime that extends beyond UDMA. This is in keeping with the basic philosophy of GPIF.


QTP 065201: FX2LP18 DEVICE FAMILY C8Q-3R TECHNOLOGY, FAB 5

AN14705 - EZ-USB® AT2LP™ Hardware Design Review Guide

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AN14705 looks at each design component and guides designers as they review their AT2LP™ schematic during the design stage.

Introduction

The information in this application note is organized to help customers review and resolve AT2LP hardware design issues, and reduce the time required to fix problems. This document covers most of the known hardware issues and their fixes. The schematic used in this document is the CY4615B reference schematic; it is divided into several functional examples that apply to each hardware component. Each part is described in detail. If used, this application note can help a designer filter most of their critical issues.

Migration of an EZ-USB® FX2LP™ Driver from CyUSB.sys to CyUSB3.sys – KBA92893

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Answer: The FX2LP driver has evolved since the late ‘90s. Era 2000 Windows Driver Model (WDM) architecture is no longer the preferred architecture for the Windows Operating System. Microsoft® suggests migrating to Kernel-Mode Driver Framework (KMDF). The FX2 driver is no exception to this evolution and needs to be migrated to the newer architecture. Therefore, Cypress® decided to retire the FX2LP (CyUSB) driver after Windows 7 and adopt a newer KMDF architecture through the CyUSB3 driver that has support from XP through Windows 8.1.

CyUSB3.sys is a Microsoft certified driver for FX2LP devices from XP through Windows 8.1.

Question: What changes are needed to make the older EZ-USB FX2LP PC host application compatible with the new CyUSB3.sys driver?

Answer: The existing FX2LP application (based on CyUSB.sys) needs to be migrated to the newer driver (CyUSB3.sys) and its pairing library (CyUSB.dll). There is an application migration task that can be done quickly and easily.

Applications that are using the Cypress Library:

C# applications need to use the newer C# dll. First remove the old CyUSB.dll in your project’s References folder and add the newer CyUSB.dll in its place.

Figure 1. Add the New CyUSB.dll to the References Section of the Project.

C++ applications need static library and header file replacement in the source code as shown below.

  • For header file replacement, you can add the newer CyAPI.h header files to your project in place of old ones or provide the path to where the newer CyAPI.h header file is located.
  • For linking to the newer CyAPI.lib library:
    1. Select the Project property
    2. Select the Linker node under Configuration Properties.
    3. Select the Input node under the Linker.
    4. Add the lib path including the lib name (for example, ..\..\lib\x86\cyapi.lib) in the Additional Dependencies edit box as shown in Figure 2.

      Fig 2: Add the New Library Path in Additional Dependencies

      New library path

    5. In addition to CyAPI.lib , you also need to add setupapi.lib (the Microsoft® provided library) in Additional Dependencies before building the application.

      Figure 3. Add setupapi.lib in Additional Dependencies

      setupapi.lib

Applications that are using the Cypress Driver API directly:

Driver API compatibility is maintained during this driver architecture change. There will be little to no impact to the existing source. Any impact will be in terms of adding new header files to the application with the changed data structures. These data structure changes occurred because of additional USB 3.0 support.

The driver API differences are documented in the Cypress CyUSB3.sys Programmer’s Reference.

AN15652 - Interfacing a Cypress MoBL-USB™ FX2LP18 with an Intel PXA27x Processor

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MoBL-USB™ FX2LP18 is a low-power, integrated USB 2.0 microcontroller. With the MoBL-USB bridge firmware, the MoBL-USB FX2LP18 can connect to any external master, such as standard microprocessors, DSPs, application-specific integrated circuits (ASICs), and FBGAs. This application note provides an example of interfacing the MoBL-USB FX2LP18 with the Intel® PXA27x processor.

Adding more endpoints to the device descriptor tables in dscr.a51

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To add more endpoints to the the device descriptor tables in dscr.a51 do the following:

  1. Open dscr.a51 for editing
  2. Change the number of endpoint value in the IntrfcDscr section to the new total number of endpoints that you want.
  3. For each endpoint that you add, copy the appropriate endpoint description section, EpInDscr or EpOutDscr.
  4. Paste the description sections into the file and change the endpoint number, and direction values. The high byte is the direction--8 for IN and 0 for OUT. The low byte is the endpoint number--2, 4, 6, or 8.
  5. Save the file and rebuild the project.

More information on the dscr.a51 file can be found in the knowledge base article Device Descriptor Table Data

AN6076 - Differences between EZ-USB® FX2LP™ and MoBL-USB™ FX2LP18

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This application note explains the major differences between the EZ-USB FX2LP™ and the MoBL-USB™ FX2LP18 from the perspective of a user.

Enumeration of EZ-USB® FX2LP™ from Off-Chip Memory - KBA92900

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Answer: The EZ-USB® executes the code from off-chip memory only under the following three conditions:

  • A flash, EEPROM, or other memory is attached to the address/data bus.
  • The EEPROM connected to I2C lines does not have a valid first byte (0xC0 or 0xC2).
  • The EA pin of FX2LP is connected to logic high.

Note: If the connected off-chip memory does not have firmware, then it will not enumerate as the default device.

Figure 1. EA Pin Connected to Logic High


FX2LP Audio Device in windows volume control

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The following steps have to be followed in order to get an FX2LP audio device to appear in the Windows Volume control:

Specify in the feature unit descriptor which features of the audio device need to be controlled, for e.g. volume, mute, tone, AGC etc.

Modify firmware to respond to the class specific requests from the host.

Feature unit control requests are used by the host to get and set the feature unit controls. For each control that has to be implemented, the host will send a series of feature unit control requests after enumeration. The firmware has to be modified to respond appropriately to these requests.

For example, if it is specified in the feature unit descriptor that volume control is needed, after enumeration, the host will send requests to get the current, minimum and maximum values of the device?s volume. Code should be added to the setupcommand() function in fw.c so that the device responds to these requests. If the values returned are within appropriate limits, then the device name will get listed in the volume control panel. For volume control, the current, minimum and maximum attributes can rangefrom +127.9961 dB (0x7FFF) down to -127.9961 dB (0x8001).

To find more information on feature unit descriptors and requests please go through the document ?USB Device Class Specification for Audio Devices' from the following link: http://www.usb.org/developers/docs/devclass_docs/audio10.pdf

 

AN1193 - Using Timer Interrupt in Cypress EZ-USB® FX2LP™ Based Applications

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AN1193 is aimed at helping EZ-USB® FX2LP™ based firmware developers use timer interrupts in their applications, by providing a framework based timer interrupt program written in C. The assumption is made that one has a general understanding of how interrupts work within the 8051 concept. When this program is run, you should be able to light the seven-segment LED on the FX2LP Development Board (CY3684) with a 0-9 count, and control the step rate using BULK OUT endpoint transfers from the EZ-USB Control Panel.

AN4078 - Migrating from EZ-USB® FX2™ to EZ-USB FX2LP™

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AN4078_C provides details on how to migrate an EZ-USB® FX2 based design to EZ-USB FX2LP based design. It highlights the differences between the EZ-USB FX2LP™ and EZ-USB FX2™. It also provides a brief description of the whole product support collateral available for development work with FX2LP.

Introduction

The EZ-USB FX2LP (CY7C68013A) is a next-generation USB high-speed controller. EZ-USB FX2LP enhances the functionality of the EZ-USB FX2 (CY7C68013) while minimally effecting existing designs. This application note serves two purposes:

  1. Assist in migrating existing EZ-USB FX2 (also referred to as FX2 in this application note) applications to EZ-USB FX2LP (also referred to as FX2LP in this application note).
  2. Assist the designers familiar with FX2 in creating FX2LP based applications.

A summary of the main items to consider while replacing the FX2 in an existing application with an FX2LP part is provided. The changes are categorized into required essential changes for all FX2LP applications migrating from FX2 and other applications based changes that might be required in your application due to additional enhanced feature in FX2LP.

Preventing the “This Device Can Perform Faster” Pop Up – KBA94209

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Answer: When a high-speed capable device is made to work only at full speed (12 Mbps), the "This device can perform faster" pop up will appear when you connect the device to the host. This pop up appears when the ports to which the device is connected are capable of operating at high speed (480 Mbps), but the device connected is operating at full speed. You can prevent the pop up from appearing by switching the revision back to USB Specification 1.1. To do this, make the value of the bcdUSB = 0x0110 in the Device Descriptor. This change will not affect your application in any way if you intend to run the device only at full speed. By reverting back to USB Specification 1.1 in the Device Descriptor you can operate only at full speed (no high speed).

AN57322 - Interfacing SRAM with FX2LP over GPIF

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This application note discusses how to connect Cypress SRAM CY7C1399B to FX2LP over the General Programmable Interface (GPIF). It describes how to create read and write waveforms using the GPIF Designer. This application note is also useful as a reference to connect FX2LP to other SRAMs.

Introduction

The GPIF is an 8-bit or 16-bit programmable parallel interface that helps to reduce system costs by providing a glueless interface between the EZ-USB FX2LP™ and an external peripheral. It is a highly configurable and flexible piece of hardware that allows you to get the most out of your USB 2.0 design. GPIF fits into applications that need an external mastering device to exchange information. The GPIF allows the EZ-USB FX2LP to perform local bus mastering to external peripherals implementing a wide variety of protocols.

CY7C68023, CY7C68024: EZ-USB® NX2LP™ USB 2.0 NAND Flash Controller

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EZ-USB® NX2LP™ USB 2.0 NAND Flash Controller

Features

  • High-Speed (480-Mbps) or Full-Speed (12-Mbps) USB support
  • Both common NAND page sizes supported
    • 512 bytes — Up to 1 Gbit capacity
    • 2K bytes — Up to 8 Gbit capacity
  • Eight chip enable pins
    • Up to eight NAND flash single device chips
    • Up to four NAND flash dual-device chips
  • Industry-standard ECC NAND flash correction
    • 1-bit error correction per 256 bytes
    • 2-bit error detection per 256 bytes
  • For more, see pdf.

Introduction

The EZ-USB NX2LP (NX2LP) implements a USB 2.0 NAND Flash controller. This controller adheres to the Mass Storage Class Bulk-Only Transport Specification. The USB port of the NX2LP is connected to a host computer directly or through the downstream port of a USB hub. The Host software issues commands and data to the NX2LP and receives the status and data from the NX2LP using the standard USB protocol.

AN64408 - Getting Started with NX2LP-Flex™

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AN64408 presents the features and the resources available to speed EZ-USB NX2LP-Flex™ based design from concept to production.

Introduction

EZ-USB® NX2LP-Flex (CY7C68033/CY7C68034) is a firmware-based, programmable low power USB 2.0 NAND Flash controller. By integrating the USB 2.0 transceiver, serial interface engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip, Cypress has created a very cost-effective solution that enables feature-rich NAND Flash-based applications.


USB 2.0 boosts bus speeds

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Featured in Network World Fusion News

http://www.nwfusion.com/news/tech/2002/0429tech.html

 

The USB specification was recently updated to improve the performance and usability of PC peripherals, opening the door to a world of high performance and high bandwidth, such as mass storage, digital video and broadband access. The speed of USB 2.0 has been increased to 480M bit/sec, a 40-fold improvement over Version 1.1.

AN15456 - Guide to a Successful EZ-USB® FX2LP™ Hardware Design

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Building a USB device requires careful attention to design details beyond the USB specification. This application note discusses design topics common to any USB device, focusing on Cypress’s EZ-USB® FX2LP™ devices. The information presented also applies to the older FX1 device and to USB devices in general. The note concludes with a schematic review checklist to help you make any USB hardware design a success, and a description of Cypress software that helps with device checkout.

Introduction

USB 2.0 brought a significant increase in bandwidth over the 1.1 specification. Offering 40x more bandwidth, it increased the importance of a good PCB design and a careful selection of components surrounding USB chips such as Cypress’s FX2LP. This application note presents a host of USB design topics that apply to any USB device at any speed, but especially to the higher speeds of USB 2.0. Although the discussions are specific to Cypress devices, they also should be helpful in any USB peripheral design.

Drivers for FX1/FX2LP – KBA94413

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Answer: The attached .zip file has the CyUSB3.inf and CyUSB3.sys file for FX2LP ( CY7C68013A / CY7C68014A / CY7C68015A / CY7C68016A ) and FX1 ( CY7C64713). The supported OS are   Windows XP   ( 32 and 64 bit ),   Windows Vista   ( 32 and 64 bit ) and   Windows 7   ( 32 and 64 bit ), Windows 8 (32 and 64 bit), Windows 8.1 (32 and 64 bit).

Use CyUSB3.inf in the path  (after extracting the .zip file)  shown in the below table  for the respective OS.

Operating System Folder path
Windows 7 Win7\x86
Windows 7 x64 Win7\x64
Windows Vista vista\x86
Windows Vista x64 vista\x64
Windows XP wxp\x86
Windows XP x64 wxp\x64
Windows 8 Win8\x86
Windows 8 x64 Win8\x64
Windows 8.1 Win8.1\x86
Windows8.1 x64 Win8.1\X64

To match the device with the drivers, refer to the steps mentioned under the section " Matching Devices to the Driver " in the attached pdf file. Adding the VID/PID is already done in the attached inf file and the customers can skip   "Step A : Add the device's VendorID and ProductID to the CYUSB3.INF file".

Using I²C in EZ-USB® FX2LP™ to Interface with Peripherals Other Than the Boot EEPROM – KBA93230

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Answer: Yes. The EZ-USB I²C controller serves two purposes. First, it manages the serial EEPROM interface, which operates automatically at power on, to determine the enumeration method. Second, once the CPU is up and running, firmware can access the I²C controller for general-purpose use. This makes a wide range of standard I²C peripherals available to an EZ-USB-based system. Other I²C devices can be attached to the SCL and SDA lines as long as there is no address conflict with the serial EEPROM.

The A2, A1, and A0 pins of the boot EEPROM are connected to reflect 000 (for C0 load) or 001 (for C2 load). Any other combination of A2, A1, and A0 can be used for other I²C devices connected on the bus that need to be accessed by the firmware during device operation.

VBUS Monitoring Pin for EZ-USB® TX2UL™ – KBA90066

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Answer: As noted, the TX2UL CY7C68003 chip does not have a dedicated VBUS monitoring pin. However, for a self-powered device design, you can use a GPIO of the processor chip to monitor the upstream VBUS. Code can be written to monitor the state of this pin and thus the VBUS. Once a "low" is detected on the pin being used to monitor the VBUS, the pull-up resistor on the D+ pin can be disabled. You can enable or disable the pull up by using the "termselect" bits in the function control register.

Silicon Errata for the EZ-USB FX2, CY7C68013 Product Family

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This document describes the errata for the EZ-USB FX2/CY7C68013. Details include errata trigger conditions, scope of impact, available workarounds, and silicon revision applicability. Compare this document to the device’s data sheet for a complete functional description. Contact your local Cypress Sales Representative if you have questions. 

High-Bandwidth Interrupt Transfers (Three Packets per Microframe) in Windows® XP – KBA93229

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Answer: No, the Windows XP extended host controller interface (EHCI) driver does not support high-bandwidth interrupt transfers. However, it does support high-bandwidth isochronous transfer, so an isochronous endpoint configured for three packets per microframe (3*1024 bytes) can be used for such an application.


EZ-USB® FX1™/FX2™/FX2LP™ Enumerates as “USB Device Not Recognized” with a VID/PID of 0000/0000 – KBA93285

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Answer: This error occurs when the host can detect the device but is unable to enumerate it. The Microsoft® USB team has two blog posts on the possible causes and solutions to this error, Why is my USB device not detected or comes up as "Unknown Device"? and What to Try When Your USB Device is an "Unknown Device".

This issue may also occur for the following reasons (specific to FX1/FX2/FX2LP):

  • The error can result from an issue with the hardware design. There are a number of items to consider when designing a board with USB devices. Please read the application note AN15456 - Guide to a Successful EZ-USB® FX2LP™ Hardware Design for guidelines on how to make a successful USB hardware design.
  • If the hardware is designed correctly, the enumeration path in your firmware could have a bug. To check if this is the case, you can load a known working firmware (such as any of the CY3684 DVK examples) to your board and check if enumeration is successful. You can also let the device enumerate with the default descriptors (without any firmware) and check if enumeration is successful. If enumeration is not successful, consider the following:
    • The bug would be in either the USB descriptors file (dscr.a51) or the control request handling code (in fw.c).
    • In dscr.a51, the descriptors must be word aligned. Refer to A51 assembler directive for WORD-ALIGNING the descriptor for the assembler directive you can use to word-align the descriptors.
    • If you have edited fw.c (which is not recommended), make sure that the standard request handlers are kept intact from the original.
    • There may be an infinite loop in TD_Init() or TD_Poll() which prevents the control request handler (SetupCommand()) from being run.
  • This error can be observed if the EEPROM has junk data with a valid first byte (0xC0 or 0xC2) or if the firmware is corrupt (in the C2 load).

Using a Lesser Drive Level Crystal with EZ-USB® FX1™/FX2™/FX2LP™ – KBA90065

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Answer: The drive level is the maximum power you will drive into the crystal when you run the part during worst case conditions. That means 500 μW might be driven into the crystal at times. If the crystal is rated for less than 500 μW, the maximum rating on the crystal could be exceeded. This could result in faster aging of the crystal, putting it out of tolerance, or even in burn out of the crystal. Therefore, it is recommended that you use a crystal with a drive level equal to or greater than the one specified in the datasheet.

CY7C68013A, CY7C68014A, CY7C68015A, CY7C68016A: EZ-USB® FX2LP™ USB Microcontroller High-Speed USB Peripheral Controller

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EZ-USB® FX2LP™ USB Microcontroller High-Speed USB Peripheral Controller

Features

  • USB 2.0 USB IF high speed certified (TID # 40460272)
  • Single-chip integrated USB 2.0 transceiver, smart SIE, and enhanced 8051 microprocessor
  • Fit, form, and function compatible with the FX2
    • Pin-compatible0
    • Object-code-compatible
    • Functionally compatible (FX2LP is a superset)
  • Ultra-low power: ICC No more than 85 mA in any mode
    • Ideal for bus- and battery-powered applications
  • Software: 8051 code runs from:
    • Internal RAM, which is downloaded through USB
    • Internal RAM, which is loaded from EEPROM
    • External memory device (128-pin package)
  • For more, see pdf

Functional Overview

USB Signaling Speed

FX2LP operates at two of the three rates defined in the USB Specification Revision 2.0, dated April 27, 2000:

  • Full speed, with a signaling bit rate of 12 Mbps
  • High speed, with a signaling bit rate of 480 Mbps

FX2LP does not support the Low Speed signaling mode of 1.5 Mbps.

AN70983 - Designing a Bulk Transfer Host Application for EZ-USB® FX2LP™/FX3™

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Introduction

This application note demonstrates how to use the Cypress library for Microsoft .NET languages to implement host PC applications to communicate with Cypress's FX2LP and FX3 devices. Using this library, a Visual C#, Visual Basic, or Visual C++ program can communicate with an FX2LP or FX3-based device at a high level of abstraction.

Cypress offers firmware development tools for its USB controllers such as EZ-USB® FX2LP™ and FX3™. These firmware tools allow you to develop USB devices at a high level because most of the low-level USB “plumbing” is already in place. In many cases, high-speed FX2LP and super-speed FX3 USB devices can be developed by modifying example Cypress firmware.

Cypress also provides software development tools for the host PC in the form of a Visual Studio .NET library. This library simplifies USB coding at the Windows level. This application note introduces the .NET class library and shows how to create a Windows example to send and retrieve data using a “bulkloop” firmware example running on an FX2LP or FX3 Development Kit (DVK).

 

 

Please refer to the SuperSpeed Code Examples for more examples.

CY7C68033/CY7C68034: EZ-USB® NX2LP-Flex™ Flexible USB NAND Flash Controller

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EZ-USB® NX2LP-Flex™ Flexible USB NAND Flash Controller

CY7C68033/CY7C68034 Silicon Features

  • Certified compliant for bus- or self-powered USB 2.0 operation (TID# 40490118)
  • Single-chip, integrated USB 2.0 transceiver and smart SIE
  • Ultra low power – 43 mA typical current draw in any mode
  • Enhanced 8051 core
    • Firmware runs from internal RAM that is downloaded from NAND Flash at startup
    • No external EEPROM required
  • 15 KBytes of on-chip code/data RAM
    • Default NAND firmware – 8 kB
    • Default free space – 7 kB
  • For more, see pdf

Overview

Cypress Semiconductor Corporation’s EZ-USB® NX2LP-Flex (CY7C68033/CY7C68034) is a firmware-based, programmable version of the EZ-USB NX2LP (CY7C68023/CY7C68024), which is a fixed-function, low power USB 2.0 NAND Flash controller. By integrating the USB 2.0 transceiver, serial interface engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip, Cypress has created a very cost-effective solution that enables feature-rich NAND Flash-based applications.

Interfacing FX2LP™ with Image Sensor - KBA95736

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The Hi-Speed USB controller FX2LP CY7C68013A can be used for image sensor applications (in vendor mode) as shown in Figure 1.

Figure 1. FX2LP Interface with Image Sensor

FX2LP

FX2LP Pin Descriptions:

  • CLKOUT: FX2LP can provide a 12-MHz, 24-MHz or 48-MHz.clock to the image sensor. Using FX2LP as the clock source you can avoid using an extra clock source for image sensor.
  • IFCLK: Data transfers on FD are synchronous with IFCLK.
  • SLWR:When FX2LP is used in slave FIFO mode, SLWR has to be asserted to write data to endpoint buffers.
  • PA0: This GPIO can be used to monitor the start/end of the frame. You can either use PA0 as a normal GPIO or as an interrupt pin for monitoring VSYNC.
  • FD[7:0]: Port B of FX2LP has to be used as 8-bit parallel interface. If the image sensor has data lines >8 (<16), it is better to connect the upper eight data lines and leave the lower data lines of the image sensor as floating. If you want to use all the data lines >8(<16), then use both port B and Port D as 16-bit parallel bit interface. In this case, FX2LP will pass two bytes of information for each pixel adding some extra redundant bits (if number of data lines > 8 (<16)) .The host application must filter out the bits that are not related to the pixel.
  • I2C: FX2LP can act as an I2C master. You can configure image sensor registers using the I2C interface.

Image Sensor Pin Descriptions

  • XCLK: Input pin for clock. If the image sensor doesn’t support the 12-MHz, 24-MHz, or 48-MHz clock, an external clock source must be used.
  • PIXCLK: The image sensor data is synchronous to PIXCLK and must be connected to IFCLK of FX2LP.The frequency of PXICLK should be in between 5-48 MHz
  • VYSNC: The frame valid signal that indicates the starting and ending of the frame.
  • HSYNC: The line valid signal that indicates that there is valid data on data lines.
  • D[7:0]: Output data lines that carry the image data.
  • FIFOADR0 and FIFOADR1 pins of FX2LP must be connected to logic HIGH or logic LOW per the endpoint buffer that is used.

The following flowcharts provide an overview of the application:

Host Application Flowchart

Host Application

FX2LP Project Flowchart

FX2LP project

Note: 1 and 2 indicated in this flowchart are just reference points.

Note: FX2LP does not support UVC class that requires header and footer for each frame. The 8051 CPU is not fast enough to insert header and footer in between frames. Therefore, if you want to implement UVC class with FX2LP, an external FPGA must be used. The FPGA must insert the header and footer in between frames and pass the data to the FX2LP.

Create a tech support case http://www.cypress.com/support to obtain an example project.

CY7C68300C, CY7C68301C, CY7C68320C, CY7C68321C: EZ-USB AT2LP™ USB 2.0 to ATA/ATAPI Bridge

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EZ-USB AT2LP™ USB 2.0 to ATA/ATAPI Bridge

Features

  • Fixed Function Mass Storage Device - Requires no Firmware
  • Two Power Modes: Self Powered and USB Bus Powered to enable Bus Powered CF (CompactFlash) Readers and Truly Portable USB Hard Drives
  • Certified Compliant for USB 2.0 (TID# 40490119), the USB Mass Storage Class, and the USB Mass Storage Class Bulk-Only Transport (BOT) Specification
  • Operates at High-Speed (480 Mbps) or Full-Speed (12 Mbps) USB
  • Complies with ATA/ATAPI-6 Specification
  • Supports 48-bit Addressing for Large Hard Drives
  • Supports ATA Security Features
  • Supports any ATA Command with the ATACB Function
  • Supports Mode for BIOS Boot Support
  • For more, see pdf
     

Introduction

The EZ-USB AT2LP™ (CY7C68300C/CY7C68301C and CY7C68320C/CY7C68321C) implements a fixed-function bridge between one USB port and one or two ATA- or ATAPI-based mass storage device ports. This bridge adheres to the Mass Storage Class Bulk-Only Transport Specification (BOT) and is intended for bus and self powered devices.


AN65209 - Getting Started with FX2LP™

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AN65209 introduces you to the EZ-USB® FX2LP™ USB 2.0 device controller. This application note helps you build a project for FX2LP and explore its various development tools, and then guides you to the appropriate documentation to accelerate in-depth learning about FX2LP.

Introduction

The Cypress EZ-USB FX2LP (hereafter abbreviated as FX2LP) is a flexible USB 2.0 PERIPHERAL controller designed to handle maximum USB 2.0 bandwidth. To take full advantage of the USB 2.0 480 Mbps signaling rate, FX2LP contains specialized hardware to buffer the USB data and connect seamlessly to a variety of highbandwidth external devices such as MCUs, ASICs, and FPGAs. After a brief introduction to USB 2.0, this application note describes FX2LP features that contribute to its high throughput.

AN76348 - Differences in Implementation of EZ-USB® FX2LP™ and EZ-USB FX3 Applications

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With the release of the USB 3.0 specification, USB controller chips required rearchitecting to handle the ten-fold increase in USB bandwidth over the USB 2.0 specification. Cypress offers USB controllers for applications based on USB 2.0 (EZ-USB® FX2LP™) and USB 3.0 (EZ-USB FX3™).This application note describes the implementation differences between the two controllers. Example applications highlight those differences at the architectural, hardware, and firmware framework levels. While this application note emphasizes the new FX3 features, it provides links to FX2LP background materials. For the complete list of SuperSpeed code examples, visit http://www.cypress.com/?rID=101781 and for the complete list of Hi-Speed code examples, visit http://www.cypress.com/?rID=101782.

Introduction

Cypress EZ-USB FX3 is a USB 3.0 peripheral controller with highly integrated and flexible features that add USB 3.0 functionality to any system.

FX3 has a fully configurable, parallel general programmable interface called GPIF II, which can connect to an external processor, ASIC, or FPGA. The GPIF II is an enhanced version of the GPIF in FX2LP, Cypress’s flagship USB 2.0 product. GPIF II provides glueless connectivity to popular interfaces such as asynchronous SRAM, asynchronous and synchronous address data multiplexed interface, and others. To accommodate the USB 3.0 SuperSpeed signaling rates, FX3 offers architectural enhancements over FX2LP such as a RISC processor and DMA system. This application note explains the architectural differences and introduces the FX3 RTOS-based firmware frameworks.

QTP 092902: Automotive USB FX2LP (AT2LP) C8QR-3R Technology, Fab 4

AN4053 - Streaming Data through Isochronous or Bulk Endpoints on EZ-USB® FX2™ and FX2LP™

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USB applications that use data types, such as audio and video, require a flow of continuous high-speed data. This data is termed as streaming because it flows in an uninterrupted stream. This application note discusses USB high-bandwidth delivery mechanisms that support streaming data, and includes code to implement and exercise FX2LP high-bandwidth endpoints. A companion PC application is provided to select various transfer types and to measure transfer rates. The example code attached to this application note demonstrates how to use the Cypress USB Frameworks to implement alternate USB settings, enabling the host to select different transfer rates. For the complete list of USB Hi-Speed code examples, visit http://www.cypress.com/?rID=101782.

CY7C68053: MoBL-USB™ FX2LP18 USB Microcontroller

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MoBL-USB(TM) FX2LP18 USB Microcontroller

Features

  • USB 2.0 - USB-IF High-Speed and Full-Speed Compliant (TID# 40000188)
  • Single-chip integrated USB 2.0 transceiver, smart SIE, and enhanced 8051 microprocessor
  • Ideal for mobile applications (cell phone, smart phones, PDAs, MP3 players)
    • Ultra low power
    • Suspend current: 20 μA (typical)
  • Software: 8051 code runs from:
    • Internal RAM, which is loaded from EEPROM
  • 16 kBytes of on-chip Code/Data RAM
  • Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints
  • For more, see pdf
     

Functional Overview

Cypress Semiconductor Corporation’s MoBL-USB™ FX2LP18 (CY7C68053) is a low voltage (1.8 V) version of the EZ-USB® FX2LP (CY7C68013A), which is a highly integrated, low power USB 2.0 microcontroller. By integrating the USB 2.0 transceiver, serial interface engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip. Cypress has created a very cost effective solution that provides superior time-to-market advantages with low power to enable bus powered applications.

EZ-USB® FX2LP™ Throughput Measurement

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This program demonstrates the maximum throughput that can be achieved over a USB 2.0 interface with the help of the Windows Streamer application. Both bulk and ISO transfers are supported.

Note: To modify and rebuild the project, you need Keil μVision2 IDE that is also provided with the FX2LP DVK. The DVK setup can be downloaded from here.

Handling Vendor Commands in EZ-USB® FX2LP™

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The USB specification provides a mechanism, called “vendor requests,” to create your own custom USB commands. This project shows how to implement these requests. Application note AN45471 contains detailed information. Using this project with the USB Control Center, you can do things like sending packets from the PC to the FX2LP board to update the onboard LEDs and 7-segment readout.

Note: To modify and rebuild the project, you need Keil μVision2 IDE that is also provided with the FX2LP DVK. The DVK setup can be downloaded from here.


EZ-USB® FX2LP™ as HID Device

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This project implements a DVK board–based keyboard using the USB Human Interface Device (HID) class. The DVK buttons and 7-segment bars implement the keyboard functions shown in table below.

DVK Keyboard Function
f1 button Shift key
f2 button ‘a’ key
f3 button ‘b’ key
f4 button ‘c’ key
7-seg top Screen lock light
7-seg middle Caps lock light
7-seg bottom Num lock light

After you use the USB Control Center to load the hid_kb.hex file into the FX2LP board, the FX2LP board re-enumerates as a standard Windows keyboard. Any active window that accepts text will show the key presses implemented by this application. Press the Screen Lock, Caps Lock and Num Lock keyboard keys and observe that three of the 7-segment bars light along with the keyboard indicators.

Note: To modify and rebuild the project, you need Keil μVision2 IDE that is also provided with the FX2LP DVK. The DVK setup can be downloaded from here.

USB Hi-Speed Code Examples

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Code Examples integrated with Application Notes

AN# Title Part# Kits Description
AN57322 Interfacing SRAM with FX2LP over GPIF CY7C6801XA CY3684 This project describes how to configure FX2LP General Programmable Interface (GPIF) to interface to Cypress SRAM CY7C1399B. It describes how to create Read and Write GPIF waveforms using the Cypress provided tool, GPIF Designer.
AN1193 Using Timer Interrupt in Cypress EZ-USB®  FX2LP™ Based Applications CY7C6801X CY3684 This project demonstrates the usage of FX2LP timer interrupts in their applications, using the framework based timer interrupt program written in C. When this program is run, you should be able to light the seven-segment LED on the FX2LP Development Board (CY3684) with a 0-9 count, and control the step rate using BULK OUT endpoint transfers from the EZ-USB Control Panel.
AN4053 Streaming Data through Isochronous or Bulk Endpoints on EZ-USB® FX2™ and FX2LP™ CY7C6801X/
CY7C6801XA
CY3684 This project includes code to implement and exercise FX2LP high-bandwidth Endpoints, a companion PC application to measure the transfer rates. This project also demonstrates how to use the Cypress USB Frameworks to implement alternate USB settings, enabling the host to select different transfer rates.
AN61345 Designing With EZ-USB FX2LP™ Slave FIFO Interface CY7C6801XA CY3684 This project provides a sample code to interface an FX2LP™ with FPGA using Slave FIFO interface. The project is implemented and tested with Xilinx® Spartan® 6 FPGA.
AN14558 Implementing an SPI Master on EZ-USB FX2LP™ CY7C6801XA CY3684 This project details two approaches (bit-banging approach using GPIO pins and the UART block approach) to implement SPI Master interface on FX2LP.
AN65209 Getting Started with FX2LP™ CY7C6801XA CY3684 The Bulkloop project attached to this shows how to structure the FX2LP firmware to create a USB device. Much of the USB request handling is done by a Cypress-provided USB Firmware Framework, with the user code required only for the specific application requirements. The bulkloop.c file contains a full USB device template that can serve as the basis for a custom application.
AN58764 Implementing a Virtual COM Port Using FX2LP™ CY7C6801XA CY3684 This project describes the implementation of a virtual COM port device using FX2LP.
AN66806 Getting Started with EZ-USB® FX2LP™ GPIF CY7C6801XA CY3684 This project includes three examples demonstrating the General Programmable Interface (GPIF) design for FX2LP based applications, starting with a simple GPIF clock divider example. This project also includes an example for demonstrating the GPIF Manual mode and single read/write GPIF transactions over a 16-bit data bus.
AN45471 Create Your Own USB Vendor Commands Using FX2LP™ CY7C6801XA CY3684 The project includes the example code showing the implementation of handling code for any vendor-specific custom requests (called vendor requests). This shows how to create a custom USB device and communicate with it using vendor requests.
AN70983 Designing a Bulk Transfer Host Application for EZ-USB® FX2LP™/FX3™ CY7C6801XA CY3684 This example demonstrates how to use the Cypress library for Microsoft .NET languages to implement host PC applications to communicate with Cypress's FX2LP and FX3 devices.
AN63787 EZ-USB® FX2LP™ GPIF and Slave FIFO Configuration Examples Using an 8-Bit Asynchronous Interface CY7C6801XA CY3684 This project provides sample code demonstrating FX2LP GPIF and Slave configuration. This project is tested with two FX2LP development kits connected in a back-to-back setup, the first one acting in master (GPIF) mode and the second in slave mode.
AN58069 Implementing an 8-Bit Parallel MPEG2-TS Interface Using Slave FIFO Mode in FX2LP CY7C6801XA CY3684 This project presents a design example to implement an 8-bit parallel MPEG2-TS interface using the Slave FIFO mode
AN63620 Configuring a Xilinx Spartan-3E FPGA Over USB Using EZ-USB FX2LP™ CY7C6801XA CY3684 This project demonstrates a technique for dynamically configuring a Xilinx Spartan-3E Field Programmable Gate Array (FPGA) over USB using EZ-USB FX2LP. After the FPGA is configured, FX2LP can act as a high-speed data path between the USB host and the FPGA.
AN64020 Creating a FX1/FX2LP™ Composite HID Device CY7C6801XA/
CY7C64713
CY3684 This project describes how to implement a composite human interface device (HID) using FX1/FX2LP™. The example firmware explained here is a two-button mouse and a two-button keyboard function, using the four buttons on the FX1/FX2LP development board. The example firmware also has an interface which implements a loopback over bulk endpoint using Endpoint 6 and 8 to emphasize the flexibility and bandwidth capability of the device.
AN61244 Firmware Optimization in EZ-USB® CY7C6801X/
CY7C6801XA/
CY7C64713
CY3684/
CY3674
This project describes firmware optimization methods in EZ-USB using a demonstration firmware.
AN78446 Interrupt Handling in EZ-USB® FX2LP™ CY7C6801XA CY3684 This project explains the handling of three USB specific interrupts and external interrupts in EZ - USB® FX2LP™ using sample code.
AN58170 Code/Memory Banking Using EZ-USB® CY7C6801X/
CY7C6801XA/
CY7C64713
CY3684/
CY3674
This project describes methods of overcoming 64 KB firmware size limitation, imposed by 16 bit address lines of EZ-USB 8051 core, using code/ memory banking.
AN58009 Serial (UART) Port Debugging of FX1/FX2LP Firmware CY7C6801X/
CY7C6801XA/
CY7C64713
CY3684/
CY3674
This project describes the code to be added to FX2LP firmware for serial port debugging. This code enables the developer to print debug messages and real-time values of variables to the HyperTerminal program on a Windows computer or to capture it in a file using the UART in FX2LP.
AN74505 EZ-USB® FX2LP™ - Developing USB Application on MAC OS X using LIBUSB CY7C6801XA CY3684 This project describes how libusb-1.0 can be used to develop USB host application (Cocoa Application) on MAC OS X 10.6/10.7 for Cypress EZ-USB® FX2LP™ products. This includes step-by-step procedure for developing a host application to communicate with FX2LP products.
AN73609 EZ-USB® FX2LP™/ FX3™ Developing Bulk-Loop Example on Linux CY7C6801XA CY3684 This project describes how libusb can be used to develop an USB host application on a Linux-based OS for Cypress EZ-USB® FX2LP™/ FX3™ products. It includes a step-by-step procedure for developing the bulk-loop example.
AN64465 West Bridge® Integration to Android on OMAP Zoom II MDP: RNDIS, CDC-ECM, and Mass Storage Functions CYWB022X CYWBDVK002AB This project includes a reference implementation of the USB composite device with Remote Network Driver Interface Specification (RNDIS), Communication Device Class - Ethernet Control Model (CDC-ECM), and mass storage functions.

Code Examples integrated with Development Kits

The following Code Examples are integrated with CY3684 EZ-USB FX2LP Development Kit. To access these code examples, follow the path C:\Cypress\USB\CY3684_EZ-USB_FX2LP_DVK\1.0\Firmware .

Title Part# Kits Description
hid_kb CY7C6801XA CY3684 Example firmware that emulates a HID-class keyboard using the buttons and 7-segment display on the DVK board.
bulkloop CY7C6801XA CY3684 Contains a bulk loopback test that exercises the EZ-USB bulk endpoints. It loops back EP2OUT to EP6IN and EP4OUT to EP8IN.
bulkext CY7C6801XA CY3684 Contains a bulk loopback test that exercises the EZ-USB bulk endpoints. The loopback is performed using the external auto pointer. Data is copied from the OUT endpoint buffer to external RAM and then to the IN endpoint buffer. It loops back EP2OUT to EP6IN and EP4OUT to EP8IN.
bulksrc CY7C6801XA CY3684 Contains bulk endpoint endless source/sink firmware. It can be driven using the CyConsole or CyBulk. EP2OUT always accepts a bulk OUT; EP4OUT always accept a bulk OUT; EP6IN always returns a 512-byte packet, 64 bytes at full-speed. Based on buffer availability in EP8IN, the most recent packet of EP4OUT is written to EP8IN.
dev_io CY7C6801XA CY3684 Contains the source files to build simple development board I/O sample. This software demonstrates how to use the buttons and LED on the EZ-USB development kit.
EP_Interrupts CY7C6801XA CY3684 Bulk loopback firmware that demonstrates use of endpoint interrupts using EZ-USB FX2LP.
extr_intr CY7C6801XA CY3684 Firmware that demonstrates external interrupt handling INT0, INT1, INT4, INT5 and INT6.
Ibn CY7C6801XA CY3684 Contains firmware to perform bulk loopback of EP2OUT to EP6IN and EP4OUT to EP8IN using the IBN (In Bulk Nak) interrupt to initiate the transfer.
LEDCycle CY7C6801XA CY3684 Simple firmware example to demonstrate use of the general purpose indicator LEDs (D2, D3, D4, D5) on the Development Kit board.
Pingnak CY7C6801XA CY3684 Contains firmware to perform bulk loopback of EP2OUT to EP6IN and EP4OUT to EP8IN using the PING NAK interrupt to initiate the transfer.
iMemtest CY7C6801XA CY3684 Memory test firmware example. Tests on-chip RAM.
vend_ax CY7C6801XA CY3684 Contains the source files to build a vendor specific command sample. This example demonstrates how to implement different vendor commands.

The following Code Examples are integrated with CY3687 MoBL-USB FX2LP18 Development Kit. To access these code examples, follow the path C:\Cypress\USB\CY3687_MOBL-USB_FX2LP18_DVK\1.0\Firmware .

Title Part# Kits Description
hid_kb CY7C68053 CY3687 Example firmware that emulates a HID-class keyboard using the buttons and 7-segment display on the DVK board.
bulkloop CY7C68053 CY3687 Contains a bulk loopback test that exercises the EZ-USB bulk endpoints. It loops back EP2OUT to EP6IN and EP4OUT to EP8IN.
bulkext CY7C68053 CY3687 Contains a bulk loopback test that exercises the EZ-USB bulk endpoints. The loopback is performed using the external auto pointer. Data is copied from the OUT endpoint buffer to external RAM and then to the IN endpoint buffer. It loops back EP2OUT to EP6IN and EP4OUT to EP8IN.
bulksrc CY7C68053 CY3687 Contains bulk endpoint endless source/sink firmware. It can be driven using the CyConsole or CyBulk. EP2OUT always accepts a bulk OUT; EP4OUT always accept a bulk OUT; EP6IN always returns a 512-byte packet, 64 bytes at full-speed. Based on buffer availability in EP8IN, the most recent packet of EP4OUT is written to EP8IN.
dev_io CY7C68053 CY3687 Contains the source files to build simple development board I/O sample. This software demonstrates how to use the buttons and LED on the EZ-USB development kit.
EP_Interrupts CY7C68053 CY3687 Bulk loopback firmware that demonstrates use of endpoint interrupts using EZ-USB FX2LP.
extr_intr CY7C68053 CY3687 Firmware that demonstrates external interrupt handling INT0, INT1, INT4, INT5 and INT6.
Ibn CY7C68053 CY3687 Contains firmware to perform bulk loopback of EP2OUT to EP6IN and EP4OUT to EP8IN using the IBN (In Bulk Nak) interrupt to initiate the transfer.
LEDCycle CY7C68053 CY3687 Simple firmware example to demonstrate use of the general purpose indicator LEDs (D2, D3, D4, D5) on the Development Kit board.
Pingnak CY7C68053 CY3687 Contains firmware to perform bulk loopback of EP2OUT to EP6IN and EP4OUT to EP8IN using the PING NAK interrupt to initiate the transfer.
iMemtest CY7C68053 CY3687 Memory test firmware example. Tests on-chip RAM.
vend_ax CY7C68053 CY3687 Contains the source files to build a vendor specific command sample. This example demonstrates how to implement different vendor commands.

Web Code Examples

KB# Title Part# Kits Description
34626 HID example for FX2 (CY7C68013) CY7C68013/
CY7C68013A
CY3684 This is the HID keyboard example of FX2LP.

AN50963 - EZ-USB® FX1™/FX2LP™ Boot Options

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AN50963 describes in detail the boot options available in Cypress’s EZ-USB® FX1™/FX2LP™ USB 2.0 peripheral controllers. For a complete list of USB Hi-Speed code examples, visit the Cypress web page.

Introduction

Cypress’s EZ-USB FX1/FX2LP offers a highly integrated solution for USB 2.0 peripheral devices. It comes with an integrated and high-performance CPU based on the industry-standard 8051 microcontroller. A soft (RAMbased) architecture allows flexible configuration and upgrades.

AN74505 - EZ-USB® FX2LP™ - Developing USB Application on MAC OS X using LIBUSB

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AN74505 describes how libusb-1.0 can be used to develop USB host application (Cocoa Application) on MAC OS X 10.6/10.7 for Cypress EZ-USB® FX2LP™ products. This includes step-by-step procedure for developing a host application to communicate with FX2LP products. Here, a bulkloop host application is demonstrated using a bulkloop firmware.

Introduction

AN74505 describes a host application built on the MAC OS platform that uses libusb. The host application (Cocoa Application) communicates with the BULK IN and BULK OUT endpoints of FX2LP, using the interfaces provided by the APIs of libusb. This host application implements the transfer only with devices that pass the particular VID/PID(=0x04B4/0x1004) identification. The example device used in this application note is the bulkloop device. The firmware that is attached along with this application note causes a loop back of data inside the device. It also supports vendor commands, demonstrated here by using a simple vendor command. Thus this host application, with the attached bulkloop device, demonstrates the loopback of bulk data, and control transfers using a vendor command.

Code/Memory Banking Using EZ-USB® - AN58170

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The EZ-USB® family of chips has an 8051 core. The 8051 core has a 16-bit address line and is only able to access 64 KB of memory. However, the firmware size sometimes exceeds 64 KB This application note describes methods of overcoming this 64 KB limitation and also demonstrates the implementation of one such method.

AN46860 - Schematic Review Checklist for West Bridge® Astoria™

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West Bridge® Astoria™ is a USB and mass storage peripheral control device that contains three main ports: processor interface (P-port), mass storage support (S-port), and USB interface (U-port). This application note discusses the hardware recommendations and guidelines to design a system using Astoria.

Can EZ-USB® FX2™/FX2LP™ and the CY3681/84 Development Kits Support USB1.1 – KBA88222

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Answer: Yes, EZ-USB® FX2/FX2LP™ and the CY3681/84 Development Kits support USB 1.1. You can use the FX2/FX2LP Development Kits with a USB 1.1-capable host.


USB-to-Parallel Converter Using EZ-USB® FX2LP™ – KBA88219

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Answer: There are two methods to implement a USB-to-parallel interface in FX2LP.

  • The GPIF or slave FIFO mode of FX2LP can be used, depending on the external device that is being interfaced with FX2LP.
  • Without using the GPIF or slave FIFO interface, firmware can be written to implement the same using the 8051 core.

What Is the Difference between CY7C68300C/CY7C68301C/CY7C68320C/CY7C68321C and CY7C68300B/CY7C68301B/CY7C68320/CY7C68321? – KBA89319

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Answer: EZ-USB® AT2LP™ Rev. A (CY7C68300C/CY7C68301C/CY7C68320C/CY7C68321C) is an enhancement to the EZ-USB AT2LP Rev. * (CY7C68300B/CY7C68301B/CY7C68320/CY7C68321) product family. For current designs in production, the EZ-USB AT2LP Rev. A. is a drop-in replacement. These enhancements do not affect the datasheet. Please see the attached PCN061023 for more details.

Endpoint 1 Buffer Reset in EZ-USB® FX2LP™ - KBA88218

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Answer: Unlike the other endpoint buffers - that is, endpoint 2,4,6,8 buffers, which can be reset by the FIFORESET register - the only way to reset an endpoint 1 buffer is by a hard reset. A USB bus reset or a CPU reset does not reset the endpoint 1 buffer.

Streaming Application Example in EZ-USB® FX2™ and FX2LP™ – KBA90545

Internal Pull-Up or Pull-Down on Port I/O Pins in EZ-USB® FX2™/FX2LP™ – KBA90548

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Answer: No, there are no internal pull-up or pull-down resistors on the FX2/FX2LP port pins.

Connecting a 5 V Logic to EZ-USB® FX2™/FX2LP™ Pins – KBA90543

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Answer: Yes, FX2/FX2LP is 5 V tolerant on its logic inputs and drives outputs at a minimum of 2.4 V. You may connect inputs to pull-ups of 5 V, but you must guarantee that the input does not exceed 5.25 V. Outputs must not exceed VCC + 0.5 V. For a 3.3 V VCC the output pull-ups must not exceed 3.8 V.

Crystal Drive Level Requirement for EZ-USB® FX2LP™ – KBA90549

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Answer: It is the maximum power dissipation in the crystal. This is one of the most important specifications for a crystal. In operation, if the power dissipated in the crystal exceeds the specified drive level, the crystal may have long-term reliability problems. The oscillation frequency may shift from the desired value, and in extreme cases the crystal may crack and stop oscillating altogether. The crystal should satisfy the following requirements:

  • 24 MHz ± 100 ppm
  • Parallel resonant
  • Fundamental mode
  • 12 pF (5 percent tolerance) load capacitor
  • 500 μW drive level



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